ZOTAC ZBOX M and P Series Mini-PC's

ZOTAC International, a Hong Kong based and a global manufacturer of innovation, today announced two groundbreaking releases from the acclaimed ZBOX M series...

Ubisoft: Ghost Recon Wildlands - Sad state

If Ubisoft walked away with 10% of this video….they would become a better developer in their stories, content and overall game design. But Ubisoft is simply...

Intel Performance Tuning Protection Plan

Purchased Intel Performance Tuning Protection Plan for the i7 5930K. Now running at 4.5Ghz with memory at 3K. Running on a Corsair Hydro Series H110i GT ! ...

Guild Wars 2 - Bringing Antialiasing to the game

It's no surprise seeing another game slam onto the market lacking AA (Anti-Aliasing) features and Guild Wars 2 is no exception. MMORPG games tend to get...

Lowering game latency with WTFast tunneling

Taking a dive into WTFast  latency tunneling service -- is like your internet on steroids. Internet latency is a gamers worst nightmare. Any network...

Logitech G13 Advanced Gameboard

The G13 Advanced Gameboard is Logitech’s answer to gamers needs. It’s a fantastic light-weight, portable alternative for gamers who don’t want...

Rosewill Thor V2 Computer Case

Rosewill , the company behind quality hardware and affordable cases, debuted the redesigned Thor-V2 case earlier this year and has since become one of the...

Electronic Arts: Battlefield 3

As one of the most anticipated games released by EA (Electronic Arts), Battlefield 3 sets itself apart from its rivals with a great story-line and game play....

Intel will make MIC an on-die coprocessor

Intel will move its Xeon Phi accelerator card from being a PCI-Express board to becoming a coprocessor located on-die in future process nodes.

Intel’s Many Integrated Core (MIC) architecture was rebranded as Xeon Phi at this week’s ISC, however the add-on MIC accelerator card will eventually become an on-die module once transistor density can be increased. Rajeeb Hazra, VP of Intel’s Architecture Group told The INQUIRER that the company is already looking at moving the MIC coprocessor onto the same die as the CPU.

Hazra was asked whether Xeon Phi’s MIC architecture will become a coprocessor, much like the firm used its 386 chip for floating point arithmetic. “Absolutely.[...] The future is absolutely headed that way, and it is closer than you think,” Hazra replied.

However, Intel cannot just plop a MIC core alongside an Ivy Bridge Xeon core, as Hazra explained. “The one challenge is simply transistor density, you need to get to [an] advanced process node that gives you enough transistor density to be able to put it on one die. The other [challenge] is systems software that can deal with heterogeneity on die.

Accelerators need access to very high bandwidth memory, and while processor caches continue to increase in size, seeing 8GB of GDDR5 in a CPU package seems highly unlikely. Hazra wouldn’t go into detail but said, “At that point in time you probably won’t be looking at GDDR, there are other efforts.”

Since Intel’s Xeon Phi will use the 22nm Tri-gate process node that made its debut with the Ivy Bridge architecture a few months ago, at the very least it will be two years before Intel puts MIC on the same die as Xeon processors. While Hazra said Intel’s process node cadence is predictable, it is likely his team will end up waiting for improvements in memory technology in addition to a smaller process node.

via The Inquirer




Categories: Latest News, Top 10 Headlines.