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DDR2 for The Rest Of Us

Don’t you just love the way that the computer industry seems to come up with ways to make us upgrade overnight? Well, it’s actually taken a little longer with DDR2, but the question remains whether or not it will be worth the wait.

The DDR2 Standard was developed by the JEDEC (Joint Electronic Device Engineering Council), comprising engineers from the major corporations like AMD, Intel, Micron, and Corsair.  These engineers meet to develop new standards for the industry every so often.  Once a standard has been completed and documented, it is adopted by the industry.

One of the main questions asked is whether DDR2 is faster than DDR.  DDR2 is supposed to start where DDR left off.  At the time of writing, the fastest RAM available is PC4400 or DDR550.  DDR2, if released en masse today would start at PC4500 and encompass faster speeds. (Although this could easily change as DDR1 and DDR2 are an unpredictable at this time).

How do they get it to go faster?  DDR2 uses new technologies and features at the chip level that improve the integrity of the data signal, giving it the ability to operate at faster clock speeds.  These include, but are not limited to, On-Die Termination and Off-Chip Driver calibration.  DDR2 also includes a larger prefetch of 4-bit, enhanced registers, and additive latency.

On-Die Termination, or ODT, means that the mount termination register, normally on the motherboard, is moved onto the DRAM chip itself.  This results in improved signal integrity by controlling reflected noise on the transfer line, reduction of costs by reducing the parts counts on the motherboard, and easier system design by eliminating the complications of dealing with placement and routing of the termination register.

Off-Chip Driver Calibration, or OCD, is a technology in which the I/O driver resistance is set to adjust voltage to equalize the pull-up/pull-down resistance.  This results in improved signal integrity by minimizing DQ-DQS skew, improved signal quality by control of the overshoot and undershoot, and absorption of process variations from various DRAM suppliers by I/O driver voltage calibration.

In 4-bit prefetch architecture, DDR2 SDRAM can read/write 4 times the amount of data as can an external bus from/to the memory cell array for every clock, and can be operated four times faster than the internal bus operation frequency.




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